SoCs find a home in low-end embedded design
SoCs find a home in low-end embedded design
By George Saul, EE Times
January 9, 2003 (11:53 a.m. EST)
URL: http://www.eetimes.com/story/OEG20030109S0029
Until recently, the system-on-chip approach, programmable mixed-signal functionality and mainstream embedded design were considered worlds apart. Now a fusion of frugal hardware integration and advanced software arts creates a category of programmable SoCs that provides user-configurable, mixed-signal system functionality. The application space is the diverse, cost-sensitive low end of embedded design, for which new silicon capabilities integrate programmable analog and digital functions with an 8-bit microcontroller core. The companion development tools, which are a leap ahead in price/performance, comprise a class of affordable tools that simplifies, unifies and automates SoC design. Dynamic reconfigurability opens up free multiples of 100 percent hardware utilization-something to take the designer's imagination far outside the status quo. The silicon breakthroughs start with the ability to layer analog capabilities (and the requisite flas h) on top of a standard digital CMOS process, while limiting mask steps and die area to keep costs down. An on-chip analog block includes user-configurable arrays of amplifiers, comparators, resistor networks and capacitor networks. In fact, users can work in two design styles: continuous-time circuits, using amps and resistive networks, or switched-capacitor designs, using amps and capacitive networks. As you would expect, optimizing flexible interconnect topology and overcoming noise and capacitive-coupling sensitivities on the die all advance the state of the art. A salient question is whether most designs really need hand-picked analog components or can you now achieve the needed results with a highly flexible array of generic analog resources to create A/D and D/A converters, op amps, filters, timers, counters and so on. Many designers will do well with the on-chip portfolio's capabilities. They can configure the SoC to fit like a glove, eliminating costly analog components, tricky connections and additional board real estate. Anticipating future system upgrades, astute designers can leave some unused programmable functions, such as filters for noise problems, programmable gain amplifiers, limit comparators and level detectors. For more demanding applications, expect steady enhancement of on-chip analog precision and capabilities. The value of SoC functional integration cannot be traded against increased design costs. So affordable companion tools-freshly conceived to emulate the features of high-end tools-are vital. Integrated development embeds design complexities within graphical interfaces. Along with the design software, this enables a designer to achieve the analog, digital and system design at a high level of abstraction and automation. The process is simple and unified and in most cases is substantially shorter than a conventional alternative. To implement the analog functions and corresponding digital control circuits, the designer graphically defines and selects counter s, amps, filters, etc., and then graphically connects analog and digital components to each other and the I/O. An embedded device editor autorelocates a function. Along with provided functional modules, user-defined modules drop into the XML database, and automatic application programming interface creation generates a user library. Application code generation is automated, using the provided interrupt service routines and the APIs. Many designers initially want to investigate a programmable SoC to lower costs. We see examples where an off-the-shelf SoC is at cost parity with a conventional microcontroller. But an SoC's higher integration chops down the bill of materials cost and associated manufacturing expenses at board level. The dynamic reconfigurability of flash-based programmable SoCs delivers the ultimate advantage: real-time reprogrammability. This is the ability to reconfigure the register-based peripheral set and connections of the SoC on the fly, implementing discrete software-configured subsystems for each application state. Given multiples of 100 percent hardware utilization, designers can think expansively about what they can now do with a programmable SoC in their cost and complexity envelope. It's going to be a great time for mainstream embedded designers. George Saul is President and CEO of Cypress Microsystems (Bothell, Wash.), a subsidiary of Cypress Semiconductor Corp. that develops and markets products based on programmable system-on-chip mixed-signal arrays.
Related Articles
- How Low Can You Go? Pushing the Limits of Transistors - Deep Low Voltage Enablement of Embedded Memories and Logic Libraries to Achieve Extreme Low Power
- Testing Embedded MRAM IP for SoCs
- Make SoCs flexible with embedded FPGA
- An Efficient Device for Forward Collision Warning Using Low Cost Stereo Camera & Embedded SoC
- Corner Case Scenario Generation (CCSG) Tool: A Novel Approach to find corner case bugs in next generation SoCs
New Articles
Most Popular
E-mail This Article | Printer-Friendly Page |