The Thriving Silicon IP Business
By Bipul Talukdar, SmartDV
It wasn’t all that long ago when becoming a third-party silicon intellectual property (IP) provider was all the rage in the electronic system design (ESD) community. Engineers with a laptop could sit in their home office or garage, design a functional block of IP, and voila, they were in the IP business.
Times change, and the instant IP provider business has matured to include large global companies, sole proprietors, and everything in between. Third-party silicon IP is plentiful, configurable, and commoditized to support system, processor and peripherals, interface protocols, memory, and analog applications. IP can be packaged in different ways, including soft IP (software), hard IP (physical layout), and even as “chiplets,” individual silicon die that deliver the IP function. The revenue, according to the most recent ESD Alliance Market Statistics Service (MSS) news release, totaled $900.6 million in Q4 2019, a 4% increase compared to Q4 2018. The four-quarter moving average increased 10.1%. This is especially significant given that its early “two engineers in a garage” image has grown to be a worldwide multi-billion-dollar business
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
SmartDV Technologies Hot IP
Related Articles
- Hogan, Senior VP for business development at Artisan Components, sees silicon explosion as costs drop
- High Speed, Low Power and Flexibility Drive DisplayPort's Increasing Popularity
- Upskill Your Smart Soldiers and Conquer the ChipWar in Style!
- Chip War without Soldiers
- Maven Silicon's RISC-V Processor IP Verification Flow
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow