NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Differentiation Through the Chip Design and Verification Flow
By Rick Carlson, Verification Design Automation
EETimes (September 23, 2021)
The makeup of the semiconductor industry is evolving and expanding once again. This time it’s a variety of companies, including tech giants Apple, Amazon, Facebook, Microsoft and Tesla, not known previously to be in the chip development business, instigating the change. They are hiring experienced engineers to design better performing, power-efficient computer chips for all kinds of applications, from networking and cloud to autonomous driving. Along the way, they are ripping up the pages of the traditional semiconductor playbook and putting in place their own individual guides to semiconductor design. The result is custom-made chips rather than using a generic chip to fit their requirements.
These system companies are also quietly and, perhaps secretly, keeping their projects under wraps and building a portfolio of intellectual property (IP) that they want to keep secure and differentiated from their competitors. They want control and the ability to customize their own IP. They are also looking for vendor partners willing to take an extra step to ensure their chips are tailored to their specific applications. It’s apparent that these companies want strategic, multi-year agreements with partners that won’t share their differentiation and pay more than a typical proposal, accomplished if sales managers are creative.
Yes, the traditional steps through the system design process as we know them are changing. Perhaps the first to notice the trend is where electronics begins –– the computer aided design (CAD), now more commonly known as the electronic design automation (EDA) or electronic system design (ESD) community. This scenario is an evolution for a community serving the semiconductor industry with design tools since the 1980s.
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