RISC-V Fast-Forwards, Breaks Ground for Auto Innovations
By Anders Holmberg, IAR Systems.
EETimes (July 17, 2023)
The SiFive RISC-V Automotive CPU IP continues to advance to address and enable automotive applications like infotainment, connectivity and advanced driver-assistance systems. Yet without the right tools, embedded software developers at OEMS and suppliers cannot make full use of the energy efficiency, simplicity, security and flexibility that RISC-V offers.
Formal standards for safety certification have been around for many years, but over the last few years, the interest in and use of such standards has risen quite dramatically. Within automotive systems, the sector-specific standard ISO 26262 is used. Getting your application functional safety (FuSa)-certified is just a fact of life in the automotive industry. However, this process is not full-fledged in the RISC-V toolchain ecosystem, with many players coming from the broad market missing the embedded expertise in safety applications.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Related Articles
- Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
- EAVS - Electra IC Advanced Verification Suite for RISC-V Cores
- Why RISC-V is a viable option for safety-critical applications
- Accelerating RISC-V development with Tessent UltraSight-V
- Certifying RISC-V: Industry Moves to Achieve RISC-V Core Quality
New Articles
- Understanding MACsec and Its Integration
- Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
- The Critical Factors of a High-performance Audio Codec - What Chip Designers Need to Know
- Density Management in Analog Layout Design: Addressing Issues and Ensuring Consistency
- Nexus: A Lightweight and Scalable Multi-Agent Framework for Complex Tasks Automation
Most Popular
- System Verilog Assertions Simplified
- Synthesis Methodology & Netlist Qualification
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)