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ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine
An FPGA-to-ASIC case study for refining smart meter design
By Barry Lai, Faraday Technology
EDN (November 9, 2023)
Many embedded system designs are first implemented using FPGAs. This may be for quicker prototyping or to provide a platform for software development. Sometimes, the FPGAs will remain in the design after production begins. But usually, the plan is to convert the FPGA (or FPGAs) to an ASIC for volume manufacturing.
It is easy to think of this conversion as nearly automatic. Just recompile the verified FPGA RTL code using ASIC libraries, verify the resulting netlist, and send the files to a back-end design shop. But to get the best results, the process may not be that simple—especially if there is an opportunity to consolidate multiple chips into the ASIC or if mixed-signal functions are required.
Recently, Faraday Technology participated in such an FPGA-to-ASIC conversion project for a smart electric meter. The design illustrates many of the important nuances of the conversion process. And it shows the importance of finding the right conversion partner.
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