Soft peripherals

Soft peripherals
By Jim Turley, Embedded Systems Programming
May 14, 2003 (2:53 p.m. EST)
URL: http://www.eetimes.com/story/OEG20030509S0043

Do we really need another entry into the processor space? Maybe—if it's a processor like no other.

"Pay no attention to the man behind the curtain," admonished the great and powerful Wizard of Oz. Embedded design is all about hiding what's behind the curtain, or inside the box. If the radio or TV works, it doesn't matter whether the inside holds vacuum tubes, digital electronics, or a little man who sings. Which brings us to Ubicom's new IP3023 microprocessor. Meet the little man.

This chip is a bit-banger's delight. At first glance, it appears to have a built-in Ethernet interface, a USB controller, both PCI and ISA bus interfaces, a PCMCIA slot, a synchronous DRAM controller, and the usual assortment of UARTs and whatnot.

In reality, the chip has none of that hardware. Instead, software wiggles the pins to make it look like it has Ethernet, USB, PCI, and all those other features. That's right—you bit-bang the I/O pins just like you did in the '70s. (For tender young readers innocent of the late-twentieth-century technique of bit banging, it involved writing a 1 bit, then a 0 bit to a programmable I/O pin to make the pin go high, then low. You could toggle the pin exactly as fast as your software could write to the I/O register. This was considered an embarrassingly low-tech but useful way to wiggle I/O pins when more elegant methods did not present themselves.)

Although most programmers have used this method to turn on LEDs, Ubicom has taken bit-twiddling to its logical extreme. It literally toggles every single I/O pin through software. There are no hardware peripherals in the usual sense, just a 32-bit processor in a 208-pin package. But for all intents and purposes, the chip works as if it had a full complement (indeed, an overabundance) of peripherals.

A built-in RTOS
The key to Ubicom's sleight-of-hand is twofold. The IP3000 series of processors, of which the IP3023 is the first member, has just 40 instructions, and they all execute in a single clock cycle. Apart from the mandatory shift, branch, arithmetic, and rotate instructions, there isn't a lot there. Many (in fact, most) instructions can modify memory directly, a throwback to CISC days.

The other key part is Ubicom's built-in multitasker with response time measured in nanoseconds. Ubicom says its IP3023 chip has a worst-case interrupt latency that's a thousand times shorter than that of VxWorks or Linux. Three orders of magnitude can make a big difference in how you plan your interrupt handlers.

For example, every "peripheral" on the IP3023 chip is treated as its own task. Want Ethernet? That's a software task. A USB port? That's another task. Need a PCI interface? That's a third. The IP3023 switches between tasks so fast that each task can wiggle outside pins as quickly and reliably as a "hardware" Ether net, USB, or PCI interface would. And since it's all controlled by software, you can modify, update, or upgrade your peripherals pretty easily.

But why would you want to? Replacing simple, reliable, and totally automatic hardware features with software simulacrums seems like an invitation for trouble. And how is wiggling pins through software an improvement over hardware that wiggles itself? It's tempting to think that Ubicom's engineers did it because it was cool—because they can—but there may be a method to their apparent madness.The payoff for programmers is that you can buy one chip for multiple applications. For example, if you don't want USB, you simply don't run that task. The same goes for PCMCIA, SPI, UARTs, Ethernet, and even the DRAM controller. The peripheral mix is whatever you, as the programmer, want it to be. The hardware is generic.

The payoff for Ubicom is obvious. The company needs to produce only one type of microcontroller, which it can then sell in different markets f or different applications. It's as if General Motors produced only two or three different cars but sold them under 12 different names. (Wait a minute—that's what GM does now.)

Embedded multithreading
At 250MHz, the IP3023 can emulate most serial or parallel interfaces out there. In addition to 100Mbps Ethernet, 802.11g WiFi, Utopia, Bluetooth, and HomePlug are all within its grasp. Each is implemented as a software state machine that makes greater or lesser demands on the processor, depending on its complexity and speed. A PCI interface, for example, is a 200-instruction loop that takes up about one-tenth of the processor's horsepower.

To keep all these "peripheral tasks" in line, the IP3023 borrows a technique normally associated with workstation and PC processors: multithreading. Popularized by Intel and its HyperThreading brand name, hardware multithreading has been around for a while, but only in high-end computers. Whereas Int el's Pentium 4 with HyperThreading can handle two simultaneous threads, the IP3023 handles eight. The processor switches threads on every cycle; every 4ns at 250MHz. Call it extreme time slicing; each task runs for exactly one instruction before being "switched out."

You organize tasks through a 64-entry task table. Each clock tick, the processor executes one instruction from the next task in the table. The task table acts as a kind of cache, giving the IP3023 visibility into the next 64 instructions. Unlike a cache, there's no risk of missing or mispredicting the next instruction, so performance is completely reliable and deterministic. If you don't have 64 tasks, you can loop through the table modulo any smaller number you want.

To raise a task's priority, you give it multiple time slots within the task table. You can give high-bandwidth peripherals, such as 100Mbps Ethernet, more run time and allocate fewer cycles to low-end tasks, such as a UART. If a task has nothing to do during its cycle (if a receive FIFO is empty, for example) it does nothing. The processor never rearranges tasks to take advantage of dead or wasted cycles.

It's pretty easy to calculate how often a task needs to run because the Ubicom processor's computing is so predictable. Unlike most processors, there are no caches, no interrupts, and no data-dependent instructions. If you need to check a buffer every microsecond, just schedule its task to run every 250 cycles. Generating square waves, performing pulse-width modulation, and producing clock waveforms are all relatively straightforward.

The IP3023 never disables interrupts because there are no interrupts to disable. You handle interrupts with another task that monitors one or more input pins (you get to decide how many). Thus, any pins you want can become interrupt inputs. Their latency is determined by how frequently you choose to monitor them; if you schedule your interrupt request task to run every eighth cycle, for instance, you're looking at a 32ns interrupt laten cy.

Some minor caveats
Not everything has to be scheduled with fanatical rigidity. Tasks can also be classified as non-real-time, in which case the chip runs them whenever it has time. This is like a normal preemptive operating system where tasks vie for resources, eking out time slices when other tasks are stalled.

Alas, the IP3023 is not immune to normal processor weaknesses. Branch instructions insert some unpredictability into this chip's normally ordered world. Will the branch be taken or won't it? A branch misprediction opens up a delay slot behind the branch for a non-real-time task to run. Other real-time tasks are not moved up into the open slot, since that would affect their determinism. In the worst case (an open delay slot with no active non-real-time tasks), the processor just executes a NOP.

You can have as many non-real-time tasks as you want, and you can set aside time slots for them in the task table. In fact, you mi ght have only a few real-time tasks scheduled, with non-real-time tasks sharing the bulk of the processor's resources. This is the way most operating systems work these days.

Speaking of other operating systems, there aren't any. Only Ubicom's built-in OS is prepared to handle software I/O. Without that, it's just another processor with a new instruction set and no software support.

Is it for everyone? Probably not. But Ubicom's unusual—almost bizarre—approach gets brownie points for originality. A microcontroller that runs at 250MHz is way more performance than a lot of designers need. So Ubicom burns excess MIPS as phantom peripherals. It's a clever way to turn multitasking to your advantage. Just don't tell anybody what's inside.

Jim Turley is an independent analyst, columnist, and speaker specializing in microprocessors and semiconductor intellectual property. He was past editor of Microprocessor Report and Embedded Processor Watch. For a good time, write to jim@jimturley.com.