Process Detector (For DVFS and monitoring process variation)
The Rise of RISC-V and ISO 26262 Compliance
Can RISC-V meet ISO 26262 standards and reshape the automotive industry when it comes to functional safety? The latest trends suggest it’s already happening.
By Simon Wang, Andes Technology
ElectronicDesign (May 2, 2024)
RISC-V technology is beginning its inroads into automotive electrical/electronic (EE) architecture design. Four major trends are driving this evolution: the surge in electric vehicles (EVs), advances in self-driving technology, the emergence of software-defined vehicles (SDVs), and vehicle-to-everything (V2X) connectivity.
The extensible RISC-V instruction set architecture (ISA) offers major advantages for automotive silicon vendors, Tier-1 suppliers, and OEMs. High-performance efficiency, a modular ISA, and emphasis on security make RISC-V an attractive choice for automotive applications. Moreover, RISC-V's open ecosystem fosters innovation and collaboration, driving its widespread adoption across the automotive industry.
As industry leaders like Andes Technology pave the way with ISO 26262 international functional-safety-standard certified RISC-V CPUs, the automotive sector is poised for a new era of innovation and reliability.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Andes Technology Corp. Hot IP
Related Articles
- Case study: optimizing PPA with RISC-V custom extensions in TWS earbuds
- Why RISC-V is a viable option for safety-critical applications
- Accelerating RISC-V development with Tessent UltraSight-V
- Certifying RISC-V: Industry Moves to Achieve RISC-V Core Quality
- Leveraging the RISC-V Efficient Trace (E-Trace) standard
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow