System level on-chip monitoring and analytics with Tessent Embedded Analytics

By Tessent Embedded Analytics

In the rapidly evolving landscape of System on Chip (SoC) development, the demand for effective debugging and optimization is becoming increasingly prevalent. As SoCs grow in complexity, incorporating diverse architectures and managing varied workloads, the necessity for efficient validation, debugging, and performance optimization intensifies. This is where the pivotal role of embedded functional monitors comes into focus. They offer unparalleled insights into SoC performance and behavior, thereby facilitating the identification and resolution of potential issues. However, extracting these insights presents its own set of challenges.

Tessent Embedded Analytics

Tessent Embedded Analytics provides a complete suite of silicon IP and software for in-field and in-lab performance monitoring and optimiza­tion; silicon bring-up and debug; and hardware-based security.

Our portfolio includes configurable blocks that non-intrusively monitor all major CPUs and custom logic; transac­tion-aware probes for common buses and interconnects; high-speed communi­cations IP that allows the rich data we generate to be captured and recorded; software to process and display that data; and advanced modules that detect and block suspect bus transactions.

Embedded Analytics provides a holistic, system-level view of the complex behav­iors within today’s SoCs. Our IP and software help engineers to more quickly and cost effectively debug and optimize hardware and software in the lab and in the field.

By incorporating Embedded Analytics IP into a device, designers can intelligently monitor, understand and control the activity of any on-chip structure – includ­ing custom logic, buses, and CPU cores.

With low overhead of silicon area and power, the architecture scales from low-cost embedded chips to the largest SoC project, easing the development of AI / ML chips and heterogeneous multi­core designs with hundreds of hardware blocks and substantial amounts of software.

Key Features

• Scalable SoC monitoring/analytics
• In-life system monitoring
  • Performance monitoring, optimization, profiling
  • Hardware-based transaction filter­ing, response and forensics
• Powerful in-lab development capabilities
  • Bring-up and debug
  • Reveals hard-to-find bugs, deadlocks
  • Sophisticated software (IDE) support
  • Unified view of hardware and software
• CPU vendor independent
• Hardware-based, wire speed
• Message-based infrastructure
  • Any-to-any cross triggering
  • Easy verification and timing closure

Solution Focus

Tessent Embedded Analytics turns on-chip data into actionable information, optimizing real-life product performance in the field; accelerating SoC time-to-rev­enue; revealing hard-to-find bugs; increasing quality; de-risking development; and reducing potential liability costs. It fits gracefully into any SoC development flow and is fully compatible with a variety of third-party development tools. The Tessent UltraSight-V solution combines select Embedded Analytics IP modules, software, and a UVM verifica­tion environment especially targeted at RISC-V debug and trace applications.

Key Benefits

• On-chip monitoring and analytics IP
  • Delivered as RTL
• Hardware-based bus transaction monitoring
  • instantaneously detect abnormal behaviors
  • Mitigate threats, prevent propagation
• Continuous in-field performance optimization
  • Data centers, storage, etc.
  • Preventive maintenance/field failure analysis
  • Validation after in-field update
• Powerful software applications
  • Breakpoints, trace, cross triggering, matching, filtering, sequencing, trace and event generation
  • Support for multiple CPU vendors
  • Python extensions for analytics and visualization
• Proven integrations with third-party debug tools
• Protocol-aware monitors for bus and NoC structures
  • AXI, ACE, ACElite, OCP, CHI and others
• Rich message-based infrastructure
• On and off-chip interfaces
  • Vendors’ debug systems (CoreSight, PDTrace)
  • IEEE1149, SWD-style, Aurora, SerDes,USB2
  • Ethernet, PCIe, USB3

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Functional overview

The modular, hierarchical Embedded Analytics architecture consists of four classes of IP:

• Analytic Modules: monitor and control system components
• Message infrastructure: dedicated fabric to connect Embedded Analytics components
• Communicators: interface the Embedded Analytics system to on-chip or external systems

Analytic modules can probe system hardware or software. Some monitor system buses; others offer a memory-mapped peripheral device API for access by software; others are optimized to interface with CPUs; and some are “embedded logic analyzers” for monitor­ing custom logic. All are parameterized at design time and configurable at run time.

The message infrastructure is a dedicated, scalable message-based interconnect fabric that is easy to route while enabling low-latency signaling and cross-triggering – without interfering with the system buses or interconnect.

Communicator modules connect the Embedded Analytics environment to external systems either on or off-chip. They include lightweight peripheral interfaces; high-performance trace interconnects; and industry-standard interfaces such as JTAG, USB, Ethernet and Aurora.

To learn more about Tessent Embedded Analytics and its range of industry leading solutions, please visit: https://eda.sw.siemens.com/en-US/ic/tessent/embedded-analytics/