Commentary: Less costly HW-assisted verification needed

Formal or static verification methods, for instance, do not require the generation of test vectors, but these tools cannot test design functionality. Only dynamic testing driven by testbenches can do so-especially when embedded software such as drivers, real-time operating systems and custom applications must be tested.

Technologies proposed in the past few years-hardware verification languages (HVLs), functional verification coverage software and hardware-assisted verification-narrow the gap between designers' goals and the results obtainable from traditional logic verification, anchored in software simulation and driven by HDL testbenches.

New test languages and C/C++ libraries of test functions dramatically increase designers' productivity in terms of the number of tests generated in a given amount of time. Functional verification coverage tools increase designers' confidence in the testbenches produced with HVLs. But those categories do not address the problem of reducing the amount of time required to apply those tests, and they cannot be used when developing embedded software.

Only hardware-assisted verification can accomplish the task within a practical time frame. Unfortunately, its superior throughput has been thwarted by the soaring price of these systems.

When ICs were below 1,000 gates, the most popular functional design verification method was a breadboard emulator. With it, a design could be verified and debugged in its target system environment before silicon was fabricated. Since the design was tested under real operating conditions, functional correctness was assured. But when IC complexity passed 10,000 gates or so, breadboarding became impractical. The breadboard emulator was replaced by event-driven simulators.

Hardware emulation has become increasingly popular as a solution to the run-time problems that afflict event-based simulation. Emulators deliver execution speed close to real-time, thus enabling their use as in-circuit test vehicles. But their prohibitive cost of ownership and unfriendly usage model have restricted adoption to large corporations in limited number.

Given the advantages and disadvantages of each approach, the answer would appear to lie with next-generation hardware-assisted functional verification that merges the performance of hardware emulation with the debugging flexibility and ease of use of software simulation at the price of an event-driven software simulator. The result? More powerful verification technologies in the hands of more designers, accelerating the progress of innovation.

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