English
Configurable Processors: Ready for Prime Time
By David Fritz, ARC International
The configurable processor has been around for some years, with the promise of improved performance and reduced power consumption and real estate area. But is only recently that its promise has begun to be matched with design and verification tools. David Fritz looks at today’s options.
The configurable processor has been around for some years, with the promise of improved performance and reduced power consumption and real estate area. But is only recently that its promise has begun to be matched with design and verification tools. David Fritz looks at today’s options.
Related Articles
- Hit performance goals with configurable processors
- Creating multi-standard, multi-resolution video engines using configurable processors
- Configurable Processors for Video Processing SOCs
- Configurable processors or RTL -- evaluating the tradeoffs
- Tuning Fork - A Tool For Optimizing Parallel Configurable Processors
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow
|
E-mail This Article | 
|
|
Printer-Friendly Page |