English
Realising the Full Potential of Multi-core Designs
by Mark Lippett, Ignios
Multi-core chips offer performance, scalability, low-power and flexibility, but are they useable by software engineers? New start-up, Ignios, is addressing these issues.
ASIC, ASSP, FPGA and other System on Chip (SoC) designs containing multiple processor cores are becoming the preferred hardware platforms for many applications. Compared with uni-processor architectures, multi-core chips have the potential to provide a far higher level of price-performance. These chips combine specialist engines within a single design, which may include any configuration of multiple CPUs, DSPs and co-processors. With multi-core, a new class of flexible software-programmable designs are permeating the SoC and merchant semiconductor market. According to analysts, the multi-processor SoC segment is forecast to grow at a compound annual rate of around 30 percent.
Recent multi-core commercial designs target applications such as network processors, recordable DVDs, set-top boxes, HDTV platforms, mobile handsets and many others. The number of cores within a single design ranges from a couple to over 150. The most prevalent example of a multi-core application is the ubiquitous mobile handset; many GSM devices contain a single digital chip comprising a DSP for baseband processing and a general-purpose processor for handling the application requirements.
Click here to read more ...
Multi-core chips offer performance, scalability, low-power and flexibility, but are they useable by software engineers? New start-up, Ignios, is addressing these issues.
ASIC, ASSP, FPGA and other System on Chip (SoC) designs containing multiple processor cores are becoming the preferred hardware platforms for many applications. Compared with uni-processor architectures, multi-core chips have the potential to provide a far higher level of price-performance. These chips combine specialist engines within a single design, which may include any configuration of multiple CPUs, DSPs and co-processors. With multi-core, a new class of flexible software-programmable designs are permeating the SoC and merchant semiconductor market. According to analysts, the multi-processor SoC segment is forecast to grow at a compound annual rate of around 30 percent.
Recent multi-core commercial designs target applications such as network processors, recordable DVDs, set-top boxes, HDTV platforms, mobile handsets and many others. The number of cores within a single design ranges from a couple to over 150. The most prevalent example of a multi-core application is the ubiquitous mobile handset; many GSM devices contain a single digital chip comprising a DSP for baseband processing and a general-purpose processor for handling the application requirements.
Click here to read more ...
Related Articles
- Realising the Full Potential of Multi-core Designs
- Using sub-RISC processors in next generation customizable multi-core designs: Part 1
- Optimizing Communication and Data Sharing in Multi-Core SoC Designs
- Leveraging OCP for Cache Coherent Traffic Within an Embedded Multi-core Cluster
- Debugging a Shared Memory Problem in a multi-core design with virtual hardware
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Dynamic Memory Allocation and Fragmentation in C and C++
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
|
E-mail This Article | 
|
|
Printer-Friendly Page |