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Articles for the Week of November 18, 2024
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Streamlining SoC Design with IDS-Integrate™
System-on-chip (SoC) designers face significant challenges when integrating thousands of IP blocks from various vendors, often presented in different formats. The manual stitching and debugging of these components can result in quality issues, extended time-to-market (TTM), and complex integration hurdles.Articles for the Week of November 11, 2024
Additional ArticlesArticles for the Week of October 28, 2024
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CANsec: Security for the Third Generation of the CAN Bus
CANsec is a resource-efficient solution for securing the CAN bus against the most common cyber security threats on software-defined vehicles. Here we show that the encryption and authentication of CAN XL frames are possible without latencies or loss of bandwidth.Articles for the Week of October 21, 2024
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Accelerating SoC Evolution With NoC Innovations Using NoC Tiling for AI and Machine Learning
A new trend is emerging in the design of high-end, multi-billion-transistor system-on-chip (SoC) devices. Referred to as “NoC tiling,” this evolutionary approach uses proven, robust network-on-chip (NoC) technology to facilitate scaling, condense design time, speed testing, and reduce risk.Articles for the Week of October 14, 2024
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A new era for embedded memory
While flash memory is still the most popular non- volatile memory (NVM), several applications are beginning to adopt other types of embedded NVM technology, both because embedded flash can’t feasibly scale beyond 28nm and because of cost, power, and performance advantages.Articles for the Week of September 30, 2024
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Casting a wide safety net through post processing Checking
In this paper, we explain how we adopted the post processing method to make sure we check for signatures that are expected are present in the log files. This acted as a safety net when engineers made inadvertent mistakes and introduced issues in the code base.Articles for the Week of September 2, 2024
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An Introduction to Direct RF Sampling in a World Evolving Towards Chiplets - Part 1
This paper focuses on how direct RF sampling architecture has proved to be a felicitous approach for RF data conversion. The progress in converter technology has made it possible to increase the sampling rates and support very large bandwidth and multiple operating RF bands.- Proven solutions for converting a chip specification into RTL and UVM
- Revolutionizing Chip Design with AI-Driven EDA
- Optimizing Automated Test Equipment for Quality and Complexity
Articles for the Week of August 26, 2024
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How to cost-efficiently add Ethernet switching to industrial devices
This post explores critical considerations and solutions for implementing Ethernet switches tailored to industrial applications, emphasizing required features and cost-effectiveness.