D&R Industry Articles (March 2002)
Articles for the Week of March 25, 2002
Additional Articles- Reconfigurable scan lowers test costs
- Signal Integrity --> Diverse IP cranks noise control headaches
- Signal Integrity --> Crosstalk complicates IP reuse
- Signal Integrity --> Signal models fine-tune designs
- Signal Integrity --> Multipoint standard boosts LVDS
- Signal Integrity --> LVDS modeling techniques overcome Ibis inaccuracies
- Signal Integrity --> LVDS extends utility of 1149.1 boundary scan test
Articles for the Week of March 18, 2002
Additional Articles- Designers urged to put logic check into code
- Dream of interoperable IP butts up against reality
- Opinion: DSP vendors' focus shifting to software
- Embattled gate array players pull out an ace
Articles for the Week of March 11, 2002
Additional Articles- Platform-Based Design: The Pragmatic Solution for SoCs
- Embedded start-ups at crossroads
- On-chip test generators said to be key to cost control
Articles for the Week of March 4, 2002
Additional Articles- Porting Legacy Code to Net Processor Designs
- ESC: Real-time analysis provides transport support for scan-based emulation
- Developing memory-efficient DSP apps without assembly code
- Infrastructure reveals a novel approach to re-use
- ESC: Formal spec languages ensure design code quality
- Open system platform accelerates SoC development
- ESC: Setting up inspection for software quality
- SoC stumbling blocks cataloged at DATE
- Specialization seen hindering SoC progress
- Reality hampers vision of interoperable IP cores
Articles for the Week of February 25, 2002
Additional Articles- Making embedded software reusable for SoCs
- Security Chip Design Speeds on to Silicon
- Editorial: When the embedded system is a chip
- Embedded EE Array Grows a BISTy Core
- FPGA Is as Good as its Embedded Plan
- Value of Verification Fits Survival Profile