D&R Industry Articles (December 2003)

Articles for the Week of December 29, 2003

• Making the Most Out of 802.3af
• How co-verification speeds firmware development

Articles for the Week of December 22, 2003

• Optimizing Up/Down Conversion with FPGA Techniques
• Strained SOI on the move to mainstream

Articles for the Week of December 15, 2003

• Inside 802.11e: Making QoS a Reality over WLAN Connections
• System Design Methodologies for System on Chip and Embedded Systems
• Going to the Max on Bus Efficiency
• How to write DSP device drivers
• How to improve ROI in SoC designs
• System design, process technology need reconnecting

Articles for the Week of December 8, 2003

• Portability fueling 32-bit expansion
• Taking the 32-bit plunge promises payoffs
• ASIC option may not pay off as expected
• How to choose a CPU for your SoC design
• 32-bit DSP right mix for embedded control
• Going from 8- to 32-bit MCUs takes tools
• Micros benefit from ASIC heritage
• SoC selection for embedded computing
• Module Approach Ups 5 GHz WLAN Front-End Integration
• A Layered Verification Approach Applied to an AMBA-Based System
• Faster serdes links force system view

Articles for the Week of December 1, 2003

• Breakfast in the Valley: Who Owns the IP?
• Implementing IKE Capabilities in FPGA Designs
• IP core-centric communications protocol Introducing Open Core Protocol 2.0
• FPGA Coprocessors: Hardware IP for Software Engineers