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D&R Industry Articles (July 2004)
Articles for the Week of July 26, 2004
Additional Articles- HyperTransport reduces delays in some applications
- Advantages of FPGA design methodologies
- Using formal verification to create robust IP
- Wireless chip-to-chip link shows promise
- RapidIO moves up to Fabric
- Advanced Switching Interconnect (ASI) eases backplane
- Options emerge for 10-Gbits/s chip-to-chip interfaces
- Non-transparent bridging allows multiprocessor design with PCI Express
- Inside the HyperTransport 2.0 Interface
- New Approach Combines ASIC and FPGA Benefits
- PCI Express requires ATE strategy
Articles for the Week of July 19, 2004
Additional Articles- Managing Memory Usage in VPLS-Enabled NPU Designs
- A scalable approach to speeding physical verification
Articles for the Week of July 12, 2004
Additional Articles- Optimize drive strengths to reduce power problems
- Minimize IC power without sacrificing performance
- Trusted Platform Modules eye embedded
- Scalable IP Core of Vector Stream Cipher
- How to calculate CPU utilization
Articles for the Week of July 5, 2004
Additional Articles- How to choose a verification methodology
- Best Practices for a Reusable Verification Environment
- Specs eye functional verification, quality
- Verifying SoCs and IP in parallel
- In-circuit SoC verification controls costs
- Delivering verified AMBA AXI systems-on-chips
- From The Outside In Making Third-Party IP Work in Semiconductor Design
- Platform-Based Design and Verification with Automated IP Integration
- Verification IP for IP verification
- Vendor Cooperation Necessary for Successful IP Implementation
- Power Reduction Techniques for Ultra-Low-Power Solutions
Articles for the Week of June 28, 2004
Additional Articles- Choose carefully your industrial-strength comms protocol
- FPGAs accelerate time to market for industrial designs
- Scatternet - Part 1: Baseband vs. Host Stack Implementation
- An introduction to open-source hardware development