D&R Industry Articles (November 2004)

Articles for the Week of November 29, 2004

• Performance Optimization of Embedded Software for ARM Processors and AMBA Methodology-based Systems

Articles for the Week of November 22, 2004

• Semiconductor options for real-time signal processing
• 'Wrap' your cores to enable SoC test (ARM & Synopsys)

Articles for the Week of November 15, 2004

• Use macrocells to automate analog/mixed-signal design
• Focus on results in system language debate
• Power Islands: The Evolving Topology of SoC Power Management
• How platform-based design cuts digital still camera design time and costs

Articles for the Week of November 8, 2004

• A practical view of ESL design
• Digital Power Control Highlights

Articles for the Week of November 1, 2004

• Modeling Total Cost of Ownership for Semiconductor IP
• Navigating the Reef: Supplying IP That Works For You and Your Customer
• Getting an algorithm ready for reuse (eInfochips)
• No size fits all for signal processing on FPGA (RF Engines)
• Relational physical design: no absolutes (ReShape)
• Reality check for configurable IP blocks (IPextreme)
• Verification issues for reconfigurable IP (Actel)
• True reuse moves well beyond recycling (VSIA)
• Reuse of Analog Mixed Signal IP for SoC Design: Progress Report (Cadence Design Systems)
• Achieving Reuse with both Modifiable IP and Configurable IP (LSI Logic)