D&R Industry Articles (January 2005)

Articles for the Week of January 31, 2005

• How memory architectures affect system performance

Articles for the Week of January 24, 2005

• The Platform Based SOC Design that Utilizes Structured ASIC Technology
• Accelerating Fixed-Point Design for MB-OFDM UWB Systems
• An IP core based approach to the on-chip management of heterogeneous SoCs

Articles for the Week of January 17, 2005

• One Approach to IP Cores: Ten Years and Going Strong
• Addressing IP Reuse with Formal Verification and Assertion Based Verification
• Software synthesis for embedded systems
• Is IP Quality Achievable, Measurable and Enforceable through the Design Chain?
• Reducing false errors in clock-domain crossing analysis

Articles for the Week of January 10, 2005

• High-Speed Serial fully digital interface between WLAN RF and BB chips
• FPGA-Based DPLL Approach Delivers Wide-Lock Range
• VUPU: Configurable Processor for C Level Design
• How to boost verification productivity
• What platform ASICs are and when to use them

Articles for the Week of January 3, 2005

• Understanding and Extending SystemC UserThread Package to IA64 Platform