D&R Industry Articles (October 2007)

Featured Article

Design and implementation of Parallel and Pipelinined Distributive Arithmetic based Discrete Wavelet Transform IP core

This paper presents an approach towards VLSI implementation of the Discrete Wavelet Transform for image compression. The design follows the JPEG2000 standard and can be used for both lossy and lossless compression. In Discrete Wavelet transform, the filter implementation plays the key role. The poly phase structure is proposed for the filter implementation, which uses the Distributive Arithmetic (DA) technique.

Featured Article

ARM Security Solutions and Intel Authenticated Flash -- How to integrate Intel Authenticated Flash with ARM TrustZone for maximum system protection

There are many examples of the very significant costs associated with the failure of embedded systems to resist malicious attacks. These span multiple applications and industry segments, and include both direct costs and lost revenue opportunities. The need to improve security has been particularly driven by the ever-increasing spread of wireless systems that encompass data services and payment applications.

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PRODUCT HOW-TO: Use ARM DBX hardware extensions to accelerate Java in space-constrained embedded apps

Performance is an issue constantly raised about the Java platform. Java's portability is also a major disadvantage, as bytecode must always undergo some form of conversion to run on the native instruction set of the underlying architecture. The feature-rich demands of next-generation Java applications will quickly outstrip the capabilities of current massmarket Java handsets.

Featured Article

The ARM Cortex-A9 Processors

This whitepaper describes the details of a newly developed processor design within the common ARM Cortex applications profile

Featured Article

1Tb/s 3W Inductive-Coupling Transceiver IP for 3D-Stacked SiP

The performance gap between computation in a chip and communication between chips is increasing, making inter-chip communication a bottleneck in development of high-performance LSI systems. One approach to realize high-speed interfaces is to shorten the chip-to-chip distance. System in Package (SiP) reduces the chip-to-chip distance significantly by thinning chips and stacking chips on each other in a package, which provides strong motivation to develop high-speed, low-power, and high-density interface between 3-dimensionally (3-D) stacked chips.