D&R Industry Articles (January 2008)

Featured Article

Mixed Signal Drivers for Ultra Low Power and Very High Power Applications

Evolving niche markets, such as ICs for biomedical applications, are very challenging in respect to power consumption and on chip power dissipation, namely, wide range from ultra low power (ULP) functionality (<uW) where IC is battery powered, e.g. mobile micro transducers, to very high power (VHP, >5W), e.g. coded energy transfer from RFID¡¯s for remote sensing and animal tracking.

Featured Article

Ultra Low Power Designs Using Asynchronous Design Techniques (Welcome to the World Without Clocks)

This paper presents challenges with the synchronous (clocked) designs and describes the techniques to overcoming the same with asynchronous (Clockless) design methodology. The paper proposes to redesign the synchronous interconnect to an asynchronous interconnect that should cater to tomorrow’s needs of high speed and low power. These circuits work on Handshaking techniques. If not today SOC industry will be forced driven to this methodology tomorrow.

Featured Article

A Chip IP Integrator for System Level Design

This paper describes a new approach for chip design and system-level integration. A hierarchical RTL context-preserving insertion and connectivity methodology has been further implemented in EDA tool – chip IP integrator. This paper shares the approach, methodology and the results on a real-life system comprising several RTL design blocks in Verilog each having around a quarter of million instances as well as on an ARM 4 CPU test chip design.

Featured Article

H.264 Baseline Decoder With ADI Blackfin DSP and Hardware Accelerators

In this paper, architecture and implementation of H.264/AVC baseline decoder for D1 resolution at 30fps using ADI Blackfin DSP and Hardware accelerators in FPGA is described.

Featured Article

Automated Test-Bench for Mobile Applications

This paper describes the design and implementation of an Automated Test-Bench Application for Mobile phones that can advance the complete development cycle of application development and validate the robustness of the solution.