D&R Industry Articles (February 2008)

Featured Article

Improving design turn around time on a complex SoC by leveraging a reusable low power specification

This paper presents an approach to power design specification intent and associated enabled design methodologies that allow a scalable implementation of voltage islands.

Featured Article

Secure Your Security Key in On-Chip SRAM: Techniques to avoid Data Remanance Attacks

Security protection in modern microcontroller’s logic devices with memories is based on the assumption that information from the memory disappears completely after erasing or when the power to the memory is removed.

Featured Article

Building High-Quality, Mixed-Signal IP in 65-nm and Beyond

This paper presents some key concepts necessary to design and build high-quality mixed-signal IP in 65‑nm or smaller geometries. The paper addresses design, layout, and verification techniques—with a focus on low-power design, reliability, and yield. Several design examples are presented, highlighting key techniques employed in the Synopsys® DesignWare® Mixed-Signal Intellectual Property (MSIP) portfolio.

Featured Article

Accelerating High-Level SysML and SystemC SoC Designs

The goal of this research is to analyze the mapping between SysML and SystemC, propose and suggest the SystemC modeling techniques that should result in modeling both the structure and behavioral SysML diagram to produce a single executable that represents the system behavior. A prototype for a translation tool, a SysML model compiler, has been implemented using a UML editing tool that supports SysML.