NVM OTP NeoBit in Maxchip (180nm, 160nm, 150nm, 110nm, 90nm, 80nm)
D&R Industry Articles (December 2008)
Articles for the Week of December 22, 2008
Additional Articles- Viewpoint: Low-power design brings chip, software together
- Use open loop analysis to model power converters with multiple feedback paths
Articles for the Week of December 15, 2008
A Generalized Waveform Synthesis Mechanism for Software Radio
This paper describes a generalized method to achieve Direct Waveform Synthesis (DWS) for different modulation formats both binary and multi-level, in order to include this mechanism in the general functioning of a software based IP-core. Moreover a generalized approach for designing and managing of an IP core, which is based on Linear Algebra and specific programming, is derived from the developed algorithm.- PRODUCT HOW-TO: Doing embedded design with an Eclipse-based IDE
- Standardizing data interchanges among design tools in the ECU development process: Pt. 1 - Models, formats, and data management
- Planning, adopting and implementing adaptive reuse
- Moving motion control technology to FPGAs
- Transcoding video with parallel programming on multi-core processors
Articles for the Week of December 8, 2008
Additional Articles- Intro to low-power design
- How to exploit the uniqueness of FPGA silicon for security applications
- Algorithmic synthesis for video post-processor design
- Achieve higher accuracy using mixed-signal FPGA calibration
Articles for the Week of December 1, 2008
Video encoding with low-cost FPGAs for multi-channel H.264 surveillance
Building a high-performance, quad-channel H.264 encoder using low-cost, low-power FPGA architecture.