D&R Industry Articles (August 2009)

Featured Article

OTP with a ROM Conversion Option Provides Flexibility and Cost Savings for On-Chip Microcode Storage

This article covers the flexibility that an OTP with ROM option provides with regard to the product life cycle of high volume products. You will learn how to estimate OTP programming cost and make trade-off analysis to help you decide whether or not a mask ROM conversion makes economical sense.

Featured Article

Improving Software Driver Development and Hardware Verification Productivity using Virtual Platforms

This paper analyzes the root causes of escalating software development effort. It will highlight software driver development, specifically for traditional intellectual property (IP) models like USB, PCI-e, SATA and DDR, as a key factor in time-to-market results for combined hardware/software products. The paper will outline how higher abstraction layers of the hardware allow some areas of software development (i.e., drivers, middleware and OS’s) to become largely independent of the target hardware architecture.

Featured Article

Fast Design Productivity for Embedded Multiprocessor through Multi-FPGA Emulation: The case of a 48-way Multiprocessor with NOC

Design productivity is one the most important challenge facing future generation multiprocessor system on chip (MPSOC). The modeling of dozens of interconnected IPs with distributed memories implies intensive manual EDA based design activity. We propose to improve design productivity by raising IP reuse to small scale multiprocessor IP combined with fast extension techniques for system level design automation in the framework of multi-FPGA based emulator. A design case study of a 48-processors multiprocessor on 4 large scale FPGA based industry class emulator validates our approach.

Featured Article

A Cost-Optimized Set-Top Box Architecture

This paper presents a cost-optimized system on chip architecture for cable-based high definition TV set-top box platforms with integrated DOCSIS channel bonding and high speed home networking.

Featured Article

Embedded Software IP Verification

This presentation presents new methodology to improve the SoC verification process. The aim of this methodology is to produce higher quality designs by exposing the hidden corner cases that are not being found. The goal is to move embedded software from execution and inspection to verification.