D&R Industry Articles (January 2010)

Featured Article

A Recipe for Verification IP - The Role of Methodology

This paper will emphasize how a recipe that combines methodologies provides a superior VIP, one that reduces effort and debugging time. While avoiding reference to specific EDA tools when possible, the article also describes the creation of VIP flow at a conceptual level.

Featured Article

Architecture Oriented C Optimizations

Know your hardware! That’s what it’s all about. Using programming guidelines derived from the processor’s architecture can dramatically improve performance of C applications. In some cases, it can even make the difference between having the application implemented in C and having it implemented in assembly. Well written C code and an advanced compiler that utilizes various architectural features often reach performance results similar to those of hand written assembly code.

Featured Article

A 66-mW 3.4Gbps Transmitter PHY for HDMI Applications in 2.5V 40-nm CMOS

This paper presents a low-power Synopsys® DesignWare® High Definition Multimedia Interface Transmitter (HDMI TX) PHY in a 2.5V 40-nm CMOS process. It employs a number of features for IP portability and ultra-low power consumption. The DesignWare HDMI TX IP includes a half-rate serializer, a low-power PLL and clocking scheme in addition to a novel TX architecture. The architecture is portable into both 2.5V and 1.8V process nodes, and makes use of a “supply-less” termination scheme that eliminates the need for a 3.3V supply.