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D&R Industry Articles (June 2010)
Articles for the Week of June 28, 2010
Additional ArticlesArticles for the Week of June 21, 2010
Featured Article
Additional Articles
Multiplexed Energy Metering AFEs Ease ASIC Integration and Provide Significant Cost Reduction
Today’s energy metering standards demand higher accuracy and lower power consumption which, in turn, challenges system designers to deliver more competitive AFEs. This article reviews those challenges and presents a solution based on a multiplexed channel architecture that delivers ultra-high resolution, along with very low-power consumption and silicon area.- How to make virtual prototyping better than designing with hardware: Part 2
- How to make virtual prototyping better than designing with hardware: Part 1
- System Verilog based Generic Verification Methodology for IPs/ASICs/SOCs: A Case Study
Articles for the Week of June 14, 2010
Featured Article
Additional Articles
Low Power Verification of Connectivity IP cores - a USB HS-OTG Case Study
This paper focuses on the verification challenges and the methodology used to verify a low power design that embeds a combination of techniques to save power.- Advancing Network Packet Management and Security Using Silicon Based Subsystem IP Solutions
- Viewpoint: Debug will get your attention, sooner or later
- Power analysis of clock gating at RTL
Articles for the Week of June 7, 2010
Additional Articles- Repeatable results with design preservation
- Time is right for clockless design
- Creating Virtual Platform using The OCP-IP Modeling kit
- Softsilicon - the next era of communications silicon
Articles for the Week of May 31, 2010
Additional Articles- A look back at the last 10 years of chip design
- A monitor-based approach to verification
- Building Cost Effective and Robust SoC-based Network Appliances
- Transitioning from C/C++ to SystemC in high-level design