D&R Industry Articles (September 2011)
Articles for the Week of September 26, 2011
Metrix Driven Hardware Software System Level Verification
The scope of the paper is to explain the constraint randomized OVM based CDV methodology [4] adopted for HW SW co-verification at System Level Verification by making use of IP level verification resources and enable reuse of the verification framework across product lines within our business Lines.- NAND Flash memory in embedded systems
- Understanding Android's strengths and weaknesses
- A practical approach to IP quality inspection
Articles for the Week of September 19, 2011
Partial reconfiguration in FPGA rapid prototyping tools
FPGA rapid prototyping tools are greatly useful at the time of designing and testing complex signal processing systems, due to their graphic programming environment and the possibility they offer to functionally simulate the whole system before synthesizing the code. Furthermore, FPGA partial reconfiguration is a very effective feature when trying to reduce the resources needed to implement systems dealing with multiple functionalities. Unfortunately, this characteristic is not supported by the rapid prototyping tools. This paper exhibits the state of the art of partial reconfiguration in FPGAs and rapid prototyping tools and shows the way of linking them in a single design.- SerDes in High-Reliability, Long Reach Systems
- 3D-IC Design: The Challenges of 2.5D versus 3D
- Managing IP quality in the SoC era requires a purpose-built DM approach
Articles for the Week of September 12, 2011
5 Wirebond Power Bus Watch Out!
Wirebond package,lower cost package with lesser IO density always impose challenge for FPGA designer to meet the required power parameteric budget.This paper will share 5 watch outs on wirebond chip power bus planning.- xLuna: a Real-Time, Dependable Kernel for Embedded Systems
- Rethink your project planning with a virtual platform
Articles for the Week of September 5, 2011
USB3.0 application building using low performance 8-bit microcontroller
This article presents the aspects of building USB3.0 application using low performance 8-bit microcontroller taking an 8051 derivative as an example. First it gives a technical overview of the USB technology and its performance. In the next chapters the example architectures are discusses followed by target applications based on them.- Performance Measurements of Synchronization Mechanisms on 16PE NOC Based Multi-Core with Dedicated Synchronization and Data NOC
- FPGA-based Ethernet switches for real-time applications
- Using Multi-Gigabit Transceivers to Test and Debug FPGA
Articles for the Week of August 29, 2011
Additional Articles