D&R Industry Articles (October 2011)

Articles for the Week of October 31, 2011

Featured Article

Distributed Video Coding: Adaptive Video Splitter

In this paper, an adaptive video splitter (AVS) design and implementation details, which can also improve RD performance with significantly higher motion video sequences, are presented. This paper is backed up with experience of developing entire DVC codec C model, which is presented in authors other submitted paper.

Articles for the Week of October 24, 2011

• Making late-night debugging an exception rather than the norm
• Simple ways to manage different clock frequencies of audio codecs
• The basics of low power programming on the Cortex-M0
• A new approach to hardware design project management
• Big.LITTLE processing with ARM Cortex-A15 & Cortex-A7

Articles for the Week of October 17, 2011

• Implementing high Speed USB functionality with FPGA- and ASIC-based designs
• Creating the Xilinx Zynq-7000 Extensible Processing Platform
• Basics of porting C-code to and between ARM CPUs: ARM7TDMI and Cortex-M0
• Assertion-based verification in mixed-signal design
• Argument for anti-fuse non-volatile memory in 28nm high-K metal gate

Articles for the Week of October 10, 2011

Featured Article

Multi-FPGA NOC Based 64-Core MPSOC: A Hierarchical and Modular Design Methodology

With the increasing need for real time complex applications, number of processors in the same MPSOC design is becoming a critical parameter to evaluate its performance.

• Addressing the new challenges of ASIC/SoC prototyping with FPGAs
• Agile hardware development - nonsense or necessity?
• Time carefully the adoption of your next-generation processor

Articles for the Week of October 3, 2011

Featured Article

Static Formal Verification for System Level Verification

The scope of the paper is to explain “How to use Formal verification for System Level Verification” and how it complements CDV based methodology for System Level Verification.

• Meet the SERDES challenge: Design a high-speed serial backplane
• Designing a high-definition FPGA-based graphics controller
• Reducing Turnaround Time with Hierarchical Timing Analysis
• Debunking the myth of the $100M ASIC
• Validating your GNU platform toolchain: tips and techniques