D&R Industry Articles (November 2011)

Featured Article

Prototyping Mesh-of-Tree NOC Based MPSOC on Mesh-of-Tree FPGA Devices

We developed a a Network on Chip (NoC) with Mesh of Trees topology that has been proposed in literature, this particular topology is implemented into 2 different FPGA devices the Xilinx Virtex4 and the AboundLogic Raptor 750. The Raptor FPGA has a mesh of trees as routing interconnect structure, while the Virtex 4 routing is based on a Manhattan Structure. Our paper examines the potential benefits of the correspondence in topology of logical and physical interconnect. Results shows an important boost in performance level but less gain in resources usage.

Featured Article

icyflex: an ultra-low power DSP core for portable applications

The icyflex family of ultra low power 16/32-bit RISC processor cores developed by CSEM offers a flexible architecture that allows for different com-binations of control and DSP functionality. These processors target applications requiring long battery life at the same time as on-chip processing power. Three silicon-proven icyflex cores are available, consuming as little as 6 μW/MHz.

Featured Article

Design and Implementation of an OCP-IP Compliant 64-Node Butterfly Network on Chip on Multi-FPGA

In this paper, we report the design and multi- FPGA chip implementation of a 64-node butterfly network based on MPSOC. Our Network is placed and routed automatically on the 4 FPGA included in Eve Zebu-UF4 platform.