D&R Industry Articles (March 2013)

Featured Article

Communication centric test and debug infrastructure for multi core SoC

A communication centric SoC debug approach using control transactions, as an extension of the traditional, processor based debug access and control is presented in this paper. A structured approach is presented to control both the processor core and other critical hardware units in a hardware synchronized manner, thereby enabling both synchronous stop and start during a debug session. An efficient and processor independent mechanism to have explicit control the system at run time is presented.

Featured Article

Smart Decap Insertion Methodology

Signal and power integrity are important parameters in deep submicron technologies. For a SoC to perform as per the specifications, the above two parameters should be kept in check. As the circuits are being clocked at a faster rate to achieve higher computation capabilities, the power requirement is shooting up.

Featured Article

A Redbox on an "All Programmable SOC"

A PRP/HSR Redbox has been implemented on ZYNQ, using NetModule's modular PRP/HSR IP-core deployed on the proprietary "Zynq4Ethernet" platform which provides 5 Ethernet ports. Most of the Link Redundancy Entity has been implemented in the Programmable Logic section but management and supervision functions which are not time critical are executed in software. This solution has sufficient performance to operate not only at 100 Mb but also at Gigabit speed. It consumes about 25% of the programmable logic resources of an XC7Z020 chip.

Featured Article

Long live the battery!

There are many factors that affect the device’s power efficiency, which can be expressed in the number of hours between battery charges. Today, in the era of HD mobile screens there are two major issues that contribute to high battery drain – display brightness and power dissipation in the video and graphics subsystem. In this paper we will discuss the latter one – smart video and display pipeline in the System-on-Chip. Smart, which means providing similar performance to competitive solutions, but requiring much less power.