D&R Industry Articles (August 2015)

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Method for Booting ARM Based Multi-Core SoCs

In the boot process various modules/peripherals (like clock controller or security handing module and other master/slaves) initialized as per the SoC architecture and customer applications. In Multi core SoCs, first primary core (also called booting core) start up in boot process and then secondary cores are enabled by software.

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Clock Gating Checks on Multiplexers

With the increasing complexity of design in today’s fast changing world, the thrust on power saving has increased manifold. Consequently, gating the most toggling signal on the SoC i.e. the clock has become the norm now rather than an exception. From timing perspective, clock gating brings some challenges and some special considerations.

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High Speed ADC Data Transfer

When continuously running a high speed ADC, it can be a challenge to deal with the firehose of raw data available at the output. To use City Semiconductor’s 2.5 GS/s 12-bit ADC, for example, 30 gigabits per second of data have to be accepted.

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Floating-point FFT with Minimal Hardware

Here we discuss Centar’s floating-point FFT technology which provides IEEE754 single-precision outputs, yet is much more hardware efficient. For example in the FPGA domain, which is the focus of this note, comparisons show that other designs use up to 100% more logic elements. Such reduced hardware can move the tradeoffs between fixed and floating-point attractively in the direction of the floating-point option. Centar’s design also has better numerical properties.

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Security in vehicular systems

With the advent of IoT and increasingly interconnected and autonomous nature of a vehicle’s control modules, there has been an exponential increase in V2V, V2X and inter vehicular communications. This in turn increases the attack surface for hackers which demands state-of-art security features in modern automotive microcontrollers, moreover safety and security go hand in hand.