D&R Industry Articles (November 2015)

Featured Article

How to Ensure a Bug Free BootROM?

In this article, we outline the robust testing of BootROM by churning out best capabilities of three powerful platforms – SoC simulation, Hardware emulation, and EVB Validation.

Featured Article

Safety in SoCs: Accelerating the Road to ISO 26262 Certification for the ARC EM Processor

This white paper outlines the key requirements for ISO 26262 certification and demonstrates how to accelerate the development of safety-critical IP and SoCs through the use of out-of-the-box safety-ready IP with advanced verification qualification tools and methodologies.

Featured Article

Low-complexity compression solves video challenges

Advances in image sensors and camera technology promise to make your video applications more sensitive, with better-quality images at higher frame rates. However, this also means that more bits have to be streamed, analyzed, kept in memory, or stored for archiving. In short, you’ll need more bandwidth, expensive cabling, and new storage solutions. A smart solution to avoid these challenges is to use a lightweight, mezzanine compression, a compression that allows transporting and storing video at high quality but also at a reasonable cost, possibly even on your existing equipment.

Featured Article

Greater Debug of a SoC having heterogeneous ARM Core's

This article describes a high visibility and non-invasive debug architecture having Quad Core ARM Cortex A9 and Dual Core ARM cortex R4 cores. This debug architecture implements ARM Coresight components to enable seamless debug capability and external trace support. ARM Coresight technology and the components are re-used for debug purposes in various SOC’s having ARM cores.

Featured Article

Smart way to memory controller verification: Synopsys Memory VIP

This paper focuses on Memory controller (DDR, LPDDR etc.), which is one of most critical element involved in almost all the data paths of a SoC. It analyzes the challenges associated with memory controller verification and proposes modern approach to reduce the debug and test creation involved which accounts for >70% of the total effort spent in the verification.