D&R Industry Articles (October 2016)

Featured Article

Adaptive Rate Control Algorithm

Ethernet over the last few years has evolved to provide high bandwidth over the aggregate Gigabit link. Next generation telecommunication networks are also shifting towards packet processed network which is enveloped by Ethernet. Citing higher demand for faster and wider Ethernet network, it has become absolutely eminent to study factors holding bandwidth efficiencies of these networks.

Featured Article

Pairing Sensitive RF with Voltage Regulators for Noise-Free IoT Modules

This article presents the challenge of pairing an RF analog circuit with the appropriate inductor-based embedded Switching Regulator (namely eSR, equivalent to on-board DC/DC) allowing to meet both the power efficiency requirements and the module performance level at the same time.

Featured Article

Timing Closure in the FinFET Era

Achieving system-on-chip (SoC) timing closure is a major obstacle in the FinFET era. Even though designers can now use faster transistors that consume and leak less power than before, FinFET technology does not address the on-chip communications infrastructure or metal line resistance/capacitance issues that negatively impact timing closure.