D&R Industry Articles (September 2018)

Featured Article

CPU Soft IP for FPGAs Delivers HDL Optimization and Supply Chain Integrity

RISC-V open ISA can help military and aerospace designers who are facing challenges of minimizing power consumption, BOM cost and board area by allowing the optimization of the instruction set to give the most efficient implementation for each specific application.

Featured Article

The evolution of embedded devices: Addressing complex design challenges

We expect our devices to be smart, upgradable and accessible over the Internet and security is no longer optional. Existing standards and stack libraries can help developers complete a project in a timely, secure way. This article outlines the key design challenges an embedded developer faces today, and some of the new technologies that will help designers address these challenges.

Featured Article

Transactor vs CPU in SoC Verification

The objective of this paper is to explain the advantages of using CPU at SoC level instead of transactor. This paper puts forward few examples for understanding the differences.