NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
D&R Industry Articles (October 2018)
Articles for the Week of October 22, 2018
System Verilog Assertions Simplified
Assertion is a very powerful feature of System Verilog HVL (Hardware Verification Language). Nowadays it is widely adopted and used in most of the design verification projects. This article explains the concurrent assertions syntaxes, simple examples of their usage and details of passing and failing scenarios along with waveform snippets for the ease of understanding.Articles for the Week of October 15, 2018
Additional ArticlesArticles for the Week of October 8, 2018
Additional ArticlesArticles for the Week of October 1, 2018
New Power Management IP Solution Can Dramatically Increase SoC Energy Efficiency
This Position Paper describes a family of Power Management IP solutions integrated by Dolphin Integration’s customers into their SoC to drastically improve Energy Efficiency (EE). SoC performance metric is changing, moving from pure performance metric (GHz or MIPS) to performance efficiency and minimum power consumption. This new metric, already crucial for IoT or mobile devices, is becoming key in various applications, like automotive, embedded or space.