D&R Industry Articles (October 2020)

Featured Article

Next Gen Scan Compression Technique to overcome Test challenges at Lower Technology Nodes (Part - I)

Multiple conventional Scan compression approaches are available to reduce the test time & test data volume for years & had addressed test solutions at higher technology nodes. Nonetheless, they have certain limitations to address key challenges particularly at lower technology nodes with multimillion flop count design.

Featured Article

Specifying a PLL Part 2: Jitter Basics

This article explains a some of the key terminology and parameters commonly used to describe jitter. It will also help clarify the most important parameters for a some PLL applications, allowing the designer to better understand what is required from a PLL.

Featured Article

Understanding Efficiency of Switched Capacitor DC-DC Converters for Battery-Powered Applications

This application note provides a brief theory on the efficiency in SC DC-DC converters and a comparative efficiency analysis between the two types of switched converter architectures using a typical application case.