D&R Industry Articles (January 2024)

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FinFET Technology and Layout

FinFETs form the foundation for many of today’s semiconductor fabrication techniques but also create significant design concerns that affect your layout. Understanding the changes and design strategies that finFET requires is crucial to building an effective layout. In this post, we’ll talk about how these changes influence integrated circuit layout.

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Debugging complex RISC-V processors

To debug and profile a RISC-V processor that comprises tens or hundreds of cores and processes billions of instructions each second can be challenging. Is the software running as expected? Does the verification team see the same behavior as the firmware engineers or application developers?

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Performance Evaluation of machine learning algorithms for cyber threat analysis SDN dataset

Identifying the problem of DDoS attacks is a major problem in machine learning. To achieve this, attackers often disrupt network bandwidth, shut down system resources, and thus restrict access to legitimate users. DDoS attacks are more common across network, transport and start-up layers, utilizing a seven-layer OSI model.

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Optimizing Communication and Data Sharing in Multi-Core SoC Designs

As semiconductor manufacturing technology advances, systems-on-chip (SoCs) have increased our capacity to contain more transistors in a smaller area, enabling greater computational power and functionality. The way of connecting components in an SoC needed to evolve to support the growing data communication demands.