methodologies - Page 10

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543 Results (361 - 400)

Delivering verified AMBA AXI systems-on-chips

Jul. 08, 2004 - Delivering verified AMBA AXI systems-on-chips
Verification IP for IP verification

Jul. 08, 2004 - Verification IP for IP verification
Simplifying SoC design with the Customizable Control Processor

Jun. 25, 2004 - Simplifying SoC design with the Customizable Control Processor
ESL-based flow eases complex SoC design

Jun. 02, 2004 - ESL-based flow eases complex SoC design
Verification = IP = Verification = IP =... - Part 2 (By Dr. Aart de Geus)

May. 14, 2004 - Verification = IP = Verification = IP =... - Part 2 (By Dr. Aart de Geus)
Testing 10GE in Transport Environments

Apr. 27, 2004 - Testing 10GE in Transport Environments
Methodology for flow integrations in a SOC design

Apr. 27, 2004 - Methodology for flow integrations in a SOC design
RF CMOS challenges in SoC Implementation

Apr. 08, 2004 - RF CMOS challenges in SoC Implementation
Synopsys 'ARMs' SystemVerilog

Apr. 05, 2004 - Synopsys 'ARMs' SystemVerilog
The role of Verification IP in Complex core Design

Mar. 30, 2004 - The role of Verification IP in Complex core Design
FPGAs step up to SoC challenge

Mar. 15, 2004 - FPGAs step up to SoC challenge
It Takes tools to Raise a Programmable Mixed Signal SOC

Mar. 15, 2004 - It Takes tools to Raise a Programmable Mixed Signal SOC
Effective System Verification with a Scalable Verification Methodology

Mar. 15, 2004 - Effective System Verification with a Scalable Verification Methodology
Mixed-Signal Verification Methodology Using Nanosim Integration with VCS

Mar. 15, 2004 - Mixed-Signal Verification Methodology Using Nanosim Integration with VCS
'A la Carte' SoCs require innovative IO management

Mar. 09, 2004 - 'A la Carte' SoCs require innovative IO management
IP-Based SOC Design in an in-house C-based design methodology

Feb. 24, 2004 - IP-Based SOC Design in an in-house C-based design methodology
VSI Alliance Quality IP Metric

Feb. 16, 2004 - VSI Alliance Quality IP Metric
Functional Verification of a CAN data layer implementation: a case study

Feb. 10, 2004 - Functional Verification of a CAN data layer implementation: a case study
SystemC Verification, Simulation & Emulation of Secure Digital IP

Feb. 06, 2004 - SystemC Verification, Simulation & Emulation of Secure Digital IP
Transactional level as the new design and verification abstraction above RTL

Feb. 03, 2004 - Transactional level as the new design and verification abstraction above RTL
Innovation to drive chip performance curve

Jan. 18, 2004 - Innovation to drive chip performance curve
Hardware / Software Partitioning Methodology for Systems on Chip (SoCs) with RISC Host and Configurable Microprocessors

Jan. 20, 2004 - Hardware/Software Partitioning Methodology for Systems on Chip (SoCs) with RISC Host and Configurable Microprocessors
A Methodology for Verifying OCP Interfaces

Jan. 16, 2004 - A Methodology for Verifying OCP Interfaces
How co-verification speeds firmware development

Dec. 29, 2003 - How co-verification speeds firmware development
ASICs becoming SoCs

Nov. 24, 2003 - ASICs becoming SoCs
Placement approach cuts SoC power needs

Nov. 24, 2003 - Placement approach cuts SoC power needs
Developing and Integrating FPGA Co-processors with the TiC6X Family of DSP Processors

Oct. 28, 2003 - Developing and Integrating FPGA Co-processors with the TiC6X Family of DSP Processors
Structured ASICs allow improved design flow

Oct. 24, 2003 - Structured ASICs allow improved design flow
Serial storage SoCs demanding to test

Oct. 24, 2003 - Serial storage SoCs demanding to test
Architecture-based vs. flow-based approach to DFT

Oct. 24, 2003 - Architecture-based vs. flow-based approach to DFT
Scalable Verification Environment Using OCP Compliant Cores and eRM Compliant eVCs

Oct. 24, 2003 - Scalable Verification Environment Using OCP Compliant Cores and eRM Compliant eVCs
Attacking the Verification Challenge: Applying Next Generation Verification IP to PCI Express-based Design (by N. Mullinger, J. Hopkins & R. Hill from Synopsys)

Oct. 21, 2003 - Attacking the Verification Challenge: Applying Next Generation Verification IP to PCI Express-based Design (by N. Mullinger, J. Hopkins & R. Hill from Synopsys)
Rapidly Implementing Synthesizable ARM IP (By Alan Gibbons, Synopsys and John Biggs, ARM)

Oct. 13, 2003 - Rapidly Implementing Synthesizable ARM IP (By Alan Gibbons, Synopsys and John Biggs, ARM)
Design of Base I/O Libraries (by Ron Nikel, Co-Founder and CTO of TriCN)

Oct. 14, 2003 - Design of Base I/O Libraries (by Ron Nikel, Co-Founder and CTO of TriCN)
Under the Hood of Library IP (by Brani Buric and Mike Colwell, Virage Logic)

Oct. 10, 2003 - Under the Hood of Library IP (by Brani Buric and Mike Colwell, Virage Logic)
Revolution comes to SoC methods

Sep. 29, 2003 - Revolution comes to SoC methods
Modeling challenges for 90 nm and below

Sep. 18, 2003 - Modeling challenges for 90 nm and below
Embedding software in the SoC World

Sep. 19, 2003 - Embedding software in the SoC World
IP-Reuse and Platform Base Designs

Aug. 22, 2003 - IP-Reuse and Platform Base Designs
Attacking the verification challenges: Applying next generation verification IP to bus protocol-based designs

Aug. 05, 2003 - Attacking the verification challenges: Applying next generation verification IP to bus protocol-based designs

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