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Aeonic Generate Digital PLL for multi-instance, core logic clocking
Industry Expert Blogs
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Altera at 28nm: rethinking the FPGAPractical Chip Design - Brian BaileyFeb. 02, 2010 |
Altera this morning took the unusual step of discussing their architectural strategy for the next generation of FPGAs far in advance of even product sampling. The reasons is that for Altera at least, 28nm will mark a clear inflection point between the days when FPGA roadmaps were driven by Moore's-Law scaling and the era in which it will require major architectural innovations to deliver better performance in customers' applications.
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