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Aeonic Generate Digital PLL for multi-instance, core logic clocking
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Pistols at Dawn: Finding the middle ground between building and assemblingA View from the Top: A System-Level Blog - Frank SchirrmeisterMar. 17, 2010 |
Being challenged to a duel (see the last paragraph here) can be scary. It often helps to re-visit what one is dueling about. The discussion in question here is about the role of IP reuse vs. high-level synthesis. And as is most life situations the truth probably lies somewhere in the middle, and for sure not in the extreme position 
