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Aeonic Generate Digital PLL for multi-instance, core logic clocking
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TSMC 28nm moves toward reality, with its retinuePractical Chip Design - Brian BaileyApr. 15, 2010 |
At TSMC's Technology Forum San Jose yesterday the company once again mapped out its plans for the approaching 28nm node, in the context of a slowing overall market. Meanwhile IP vendor Virage Logic made an early public announcement of support for the process with its SiWare Memory products, shedding an interesting light on the realities behind TSMC's rather abstract schedule.
TSMC founder, chairman, and CEO Morris Chang estimated that the semiconductor market was to grow 22 percent this year—mostly reflecting the depth of last year's near-death experience. Growth in 2011 would be nearer 7 percent, Chang predicted, after which it would slow considerably, for a number of reasons.
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