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55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
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Bringing MEMS and asynchronous logic into an SoC design flowPractical Chip Design - Brian BaileyMay. 03, 2010 |
Two companies at the Embedded Systems Conference this week have similar objectives, but for very different technologies. Coventor, a vendor of CAD and analysis tools for creating MEMS devices, described a plan for bringing MEMS design into the standard CMOS SoC flow. And asynchronous logic design shop Tiempo showed a flow that facilitates development of large asynchronous blocks within a conventionally synchronous SoC.
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