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MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
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70% of re-spin issues are AMS in nature: How mixed-signal design can mess up a perfectly good SoCEDA360 Insider - Steve LeibsonNov. 08, 2010 |
The title for this blog entry comes from a statement made early in a presentation on SoC design given at this week’s International SoC Conference in Newport Beach, California. The speaker was Cormac O’Sullivan from the S3 Group in Cork, Ireland. O’Sullivan is the RF and Mixed Signal Engineering Team Lead and S3 is a design house specializing in RF and mixed-signal SoC design. The official title of his presentation was “RF SoC Design Flow.”
Why worry about RF and mixed-signal SoC design?
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