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55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
Industry Expert Blogs
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Co-design - Myth or Reality?EETimes Blog - Brian BaileyJul. 26, 2011 |
Brian Bailey
EETimes (7/26/2011 10:30 AM EDT)
I think it was probably 17 years ago when I started to attend co-design conferences. At that time they were very academic in nature and they concentrated mostly on the most optimal way to automatically partition a design written in C, Java, or some other language into hardware and software.
The interfaces were always the sticky area and most of the algorithms just assumed that communications was free both in terms of performance and resources. Some of the later ones did take this into account, but not in very flexible ways. We even started to see commercial tools in the area, not just from startups, but from Cadence – with the Felix, VCC – whatever name you preferred to call it by.
But all of this research and the tools went by the wayside. I think the primary reason was they all assumed a single thread, a single function, a single processor, a single bus – and the list could go on. Now designing and partitioning between hardware and software for such a system is not really that difficult and so the tools didn’t provide enough value to warrant their adoption.
