Industry Expert Blogs

“3D IC test wafers will run this year and high-volume 3D IC manufacturing will start in 2013,” concluded Riko Radojcic at the end of his EDPS keynote on 3D ICs held in Monterey, California last Friday. Radojcic is Qualcomm’s Director of Engineering, so he just might know something about the state of 3D IC assembly although he’s not necessarily referring to Qualcomm in the above statement. His concluding remarks came at the end of an hour’s worth of hard-earned 3D IC assembly and design insights that Radojcic has assembled at Qualcomm.

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