400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
Industry Expert Blogs
Is PHY IP really strategic? Just take a look at the various legal offensives running these days...SemiWiki - Eric EsteveMay. 09, 2012 |
Last week, at the same time I was writing a blog about PHY IP market, claiming that this market was shaken, several events happened – not on the pure business side, but on the legal side. This means that I will have to carefully check before using each word of this blog!
If you remember, the blog conclusion was focusing on V Semiconductor, a start-up created in 2008, founded by former Snowbush’ employees, who decided to leave the company short after acquisition by Gennum. In the meantime, V Semi has launched a revolutionary SerDes, revolutionary because it is based on a digital PLL and not on oscillator PLL or even on LC tank PLL, and the technology has been implemented on Intel 28nm technology to support multi-standard protocol PHY, to be used by FPGA start-up, and probably acquired by customers developing 10G Ethernet PHY. This technology looks so attractive that V Semi was about to be acquired; by which company?