Industry Expert Blogs

The high technology industry is well known for its use – and over-use – of buzzwords and jargon that can easily be rendered meaningless as they get saturated in the marketplace. One could argue ‘collaboration’ is such an example. While the word itself may seem cliché, the reality is that what it stands for has never meant more.

The concept of collaboration – when two or more partners take on a shared objective to meet a mutually defined and beneficial goal – is no longer optional if you are in the semiconductor business. Time, cost and complexity have made the ‘go it alone’ approach obsolete. On the manufacturing side, only a handful of companies have the wherewithal to bring next generation capacity on line because of unprecedented cost and difficulty.

As one of those few companies, GLOBALFOUNDRIES recognizes that collaboration is essential not only to being able to offer scalable, reliable and leading-edge manufacturing solutions, but also to enable our customers to take advantage of our offerings in a more cost-effective and optimized way.

For us, collaboration is part of our DNA. And we understand that how companies work together is a constantly changing dynamic. In fact, given the combination of technology and business factors re-shaping the semiconductor landscape today, in many ways we are helping to reinvent collaboration altogether.

We believe – and our customers confirm this – that our approach to working with companies that require a manufacturing partner, whether they are fabless, fablite or an IDM, is fundamentally different than previous generations of foundry-customer relationships.

At the heart of collaboration today is a new type of relationship that borrows from the best of both the traditional IDM and foundry models. Our relationships with customers cannot be the ‘throw-it-over-the-wall’ approach that defined previous foundry models. We must be in lock step with customers’ internal strategies to the point that we both have skin in the game. Shared investment and success are hallmarks of collaboration in the modern foundry model.

Well-respected industry analyst Handel Jones confirmed this in a recent rebuttal article in EE Times, debunking Intel’s claim that the fabless model was dying. He acknowledged the challenges faced by fabless companies and foundries alike, and called for a similar re-thinking of the model:

To address the chasm problem areas, an IDM-type interface is required between process teams at the foundry vendors and design teams at the fabless companies…A key issue is who establishes and pays for these IDM-type disciplines? Fabless company, foundry, or both? It is likely that many of the costs and disciplines will need to be shared.

This type of IDM interface changes many aspects of the typical foundry engagement model. For advanced technology, a truly collaborative relationship can begin up to two-and-a-half years before product tape out. It starts much earlier – with exploration of design architecture, specification, and methodology – and goes much deeper, through precise process targeting and methodology optimization. The benefits can be dramatic, and in some cases there is simply no other way to complete chips of this complexity in the required time frames.

As with any process as complex as semiconductor design and manufacturing, the devil is in the details. And there is no shortage of touch points that, if not considered in a collaborative light, can be major obstacles to companies’ success.

In future posts in this space I will explore in more depth, from my vantage point of overseeing GLOBALFOUNDRIES’ design enablement efforts, key issues and approaches to enhancing efficiencies through collaboration throughout the ecosystem. These include how EDA and IP relationships must change, addressing critical requirements such as power and routability, silicon-verified design flows, DFM strategies, innovative technologies such as double patterning and HKMG, as well as some fundamentally new concepts like design-enabled manufacturing (DEM), which changes the perspective of where and how critical information is used to optimize the chip development process.

I look forward to sharing my thoughts and hearing your feedback.