Industry Expert Blogs
The $10,000 ASICCool Verification - JL Gray, Verilab, Inc.Aug. 21, 2012 |
I’ve been to DAC each year since 2007. The first time I went to DAC, everything was new and exciting. After a few years, I realized there was a lot that was the same as the year before. To try to get some of the excitement back I decided to set a goal for myself for the conference this year. I would pick a question and spend the conference discussing with as many people as possible. The scenario I chose was:
Imagine you had a team of engineers with expertise in chip architecture, design, and verification available, but a non-recurring tool and IP budget of only $10,000. Under this scenario, is it currently possible to design and create a prototype of the chip using modern techniques? If not today, what would it take to make this possible 10 years from now? And if it was possible to design and create a prototype for $10,000 in tool and IP costs, would that make it easier for you to design chips?
Related Blogs
- Digitizing Data Using Optical Character Recognition (OCR)
- Intel Embraces the RISC-V Ecosystem: Implications as the Other Shoe Drops
- Mitigating Side-Channel Attacks In Post Quantum Cryptography (PQC) With Secure-IC Solutions
- Obsolete & EOL Parts
- Moortec "Let's Talk PVT Monitoring" Series with CTO Oliver King