55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
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Life Cycle of MIPI LLI ObjectVIP Central - Parag GoelSep. 26, 2012 |
In my last two blogs, I introduced the LLI stacked architecture and dwelled on what it takes to verify the credit algorithm for MIPI LLI. As far as creating the verification components goes, one of the important requirements is for the infrastructure to provide the ability to correlate and debug the object transformation across different layers of the stacked architecture. Why is that important?
In this blog, we will see that there are quite a few transformations that a transaction undergoes through the stacked architecture… If we cannot follow these transformations closely, we will be in for a debugging nightmare…
The initial input for the LLI stack is in the form of a Transaction and this undergoes various degrees of transformations before it is finally pushed out on to the physical interface via. MPHY (http://www.mipi.org/specifications/physical-layer). It may then be driven on the serial lines (differential signaling) or on the Reference M-PHY MODULE Interface (RMMI interface) as defined by MIPI MPHY specification.
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