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Aeonic Generate Digital PLL for multi-instance, core logic clocking
Industry Expert Blogs
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IP Roundtable, Part 6: Integration Issues AheadEETimes Blog - Brian BaileySep. 19, 2013 |
In the previous segment of this experts' roundtable we talked about the advantages EDA companies may have in developing and licensing IP. Today we turn our attention to IP integration issues. Taking part in today's discussion are: Mike Gianfagna, vice president of corporate marketing at Atrenta; Warren Savage, CEO of IPextreme; John Koeter, vice president of marketing for the solutions group at Synopsys; and Chris Rowen, Cadence Fellow and CTO at Tensilica.
