MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
Industry Expert Blogs
Dark SiliconSemiWiki - Paul McLellanMay. 27, 2014 |
One of the problems with chips today is that of so-called "dark silicon". We can can put massive functionality on an SoC today. A billion transistors, and that is just at 28nm. But power constraints (both leakage and dynamic power) limit how much of the chip can be powered up at any one time. In some cases this is not that big an issue: if your cell-phone is not making a call then don't power up the transmit/receive logic. But in other cases it is a huge problem. There is absolutely no point in putting a 16-core processor on a chip and then finding that 10 is the maximum number of cores that can be on at any one time. The cores are identical, so it is not like the transmit/receive logic case that I just mentioned.
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