MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
Industry Expert Blogs
Skip Initialization for DDR VIP ModelsVIP Experts Blog - SynopsysSep. 04, 2015 |
In the blog Seamless Fast Initialization for DDR VIP Models, we discussed how important it is for Memory VIP simulations to have the option of going through the process of Reset and Initialization fast, and get to the IDLE state and start reading and writing to memory location. We presented one way to achieve this by scaling down the timings required while going thru all the JEDEC standard steps required for Reset and Initialization.
In this blog, we will discuss how Synopsys Memory VIP allows skipping initialization altogether while maintaining the proper behavior of the model.
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